Implement a one button PASS/FAIL circuit board test strategy in a single day! Kozio’s hardware validation test suite provides an integrated and automated solution delivering at-speed functional test running on the device under test (DUT) coupled with powerful test management software.

The latest kDiagnostics™ Manufacturing Suite offering from Kozio allows engineers to create automated processes that dramatically reduce the cost of testing products by increasing fault coverage and throughput while minimizing test development efforts.

Product reliability is a basic requirement for any device manufacturer. As vendors race to deliver innovative products under compressed timelines, they are forced to work harder to meet expectation levels in this area. Demands to support continually evolving standards and protocols further complicate the matter, while cost constraints can limit the amount of resources available to address problems as they arise.

In embedded systems, hardware diagnostics is a key determinant of product reliability. An effective diagnostic solution can help ensure early problem identification, and provide the most efficient means of resolving design problems.

Experience has shown that stable memory is crucial for reliable use of modern electronic devices. Electronic devices use entire memory subsystems for storing applications, running programs, and storing data. Faulty memory can prevent a device from running, cause it to crash unexpectedly, or behave unreliably. Understanding test strategies for various memory technologies is of the utmost importance.

Presented is a comprehensive memory validation strategy: for automated tuning of memory, accurately determining the reliability of entire memory subsystems, pinpointing faults when repair is required, and deploying the same core solution used in design and manufacturing with the final product.

Read on to learn more. Included are valuable insider tips.

Like any other development project, classified defense or military projects must be thoroughly tested. In particular, defense and military projects frequently have board-level hardware testing requirements. Thus there is a specific need for a cost-effective and reliable solution for board-level hardware testing. To achieve this, an embedded test application with complete coverage of all circuitry, memories, and data paths is required.

Traditionally, for these classified projects, companies had no option but to build their test applications with internal engineering resources. This was usually not the best use of the companies’ resources. Now there is a better way. This paper illustrates when and how to choose an advanced embedded test solution for classified projects and custom SoCs.

Experience has shown that stable memory is crucial for reliable use of modern electronic devices. Electronic devices use entire memory subsystems for storing applications, running programs, and storing data. Faulty memory can prevent a device from running, cause it to crash unexpectedly, or behave unreliably. Understanding test strategies for various memory technologies is of the utmost importance.

Presented is a comprehensive memory validation strategy: for automated tuning of memory, accurately determining the reliability of entire memory subsystems, pinpointing faults when repair is required, and deploying the same core solution used in design and manufacturing with the final product.

Read on to find out more. Included are valuable insider tips and a customer story.

This Microsoft Excel spreadsheet provides a simple tool to calculate the hours and dollars spend developing hardware test software from scratch or reusing existing test software. Four worksheets provide an introduction, a list of modifiable assumptions, return on investment (ROI) calculations, and definitions of terms used.

Try it out!

Kozio Helps Jetter AG Overcome DDR Memory Configuration Challenges.

In just days, Kozio successfully provided support from overseas, without ever seeing or working with the actual Jetter board. Jetter was able to debug their SDRAM memory in less than two weeks, get the board up and running, and continue on with the product development process.

Kozio kDiagnostics shortens time to market for product to test triple play applications.

Spirent credits working with Kozio with not only reducing its time to market for the mAXSLAM product, but with also saving the company real development costs. After starting the development of mAXSLAM in December, Spirent was able to deliver a working beta system to its lead customer in just 10 months, with Kozio's assistance.

Kozio's kDiagnostics pinpoints PCI arbitration problem during bring-up of first known new processor board, saving days of internal effort.

Kozio kDiagnostics was able to isolate a challenging PCI bus arbitration issue, allowing ADI to quickly resolve the logic issue, saving days of challenging hardware debug effort.

This problem was masked by the fact that some of the USB and Compact Flash features were working in Linux, and the remaining problems were assumed to be USB and Compact Flash driver issues. kDiagnostics readily showed that PCI configuration cycles were working on the secondary bus, but PCI memory cycles were problematic.

This development process illustrates the typical challenges inherent in trying to use Linux to solve hardware issues, a prospect that can be very daunting and time consuming. It can be done, but in this case developers risked spending many days, if not weeks, trying to solve related issues with things like USB and Compact Flash, since these were tied to the PCI bus issue.

From contract to fully functional diagnostics in one week saves weeks of internal effort and "real dollars."

In two weeks time, Sigpro went from non-working hardware to contacting and partnering with Kozio to fully validate and fix two key hardware issues. Once again, Kozio's products and services helped quickly validate a new hardware design and save weeks of effort trying to use boot loaders or Linux to debug hardware. In addition, Kozio's experience allowed Sigpro to validate new hardware to make it stable in record time, as well as providing a usable boot loader, Linux kernel, and specialized FPGA code, saving months of code development, unit testing and integration effort.

DDR Tuning and Validation

This application note provides an explanation of how one uses Kozio kDiagnostics to automatically determine DDR controller timing window values and automatically qualify memory operations using those timing values.

In short, this document defines a procedure for using Kozio software for memory qualification. Memory qualification in this document is defined as: Determining what DDR SDRAM controller settings and ranges, if any, that allow a particular memory part to function properly.

The steps required to perform the memory qualification are outlined. kScript is the proprietary scripting language accepted by Kozio products allowing users to dynamically create new test procedures.

This document provides an example of running the memory qualification procedure on a platform using an AMCC PowerPC™ 440EP processor. The platform used for this application note contained a 440EP, DDR SDRAM, SRAM, Flash, Serial, and other components not pertinent to this discussion.

This application note describes a method to validate data flow and integrity through an entire I/O subsystem and measure and characterize I/O subsystem performance before the boot loader and application software are running on a new embedded controller board. It covers enough technical detail so an engineer can use the I/O Engine™ feature of kDiagnostics to effectively test and characterize an I/O subsystem on their own custom controller board or on a supported processor reference platform.

This note demonstrates the process of discovering and communicating with I/O subsystem controllers, specifically a Serial ATA (SATA) controller. Although SATA controllers are used in this application note, the general procedures covered can be applied to other I/O subsystem controllers such as Serial Attached SCSI (SAS), IDE, ATA, USB and others.

Covered in this application note are the steps required to:

* discover and verify a PCI connected SATA controller,
* discover attached storage devices,
* verify basic I/O subsystem functionality with pre-built tests,
* perform simple read and write operations directly to attached storage devices,
* test with actual disk drives or memory-based pseudo-targets, and
* using the I/O Engine™ feature to measure I/O performance using custom batches of concurrent random and sequential I/O.

This document provides examples, steps, and screen shots, using an AMCC Yellowstone platform, an Intel® 32144 Serial ATA I/O PCI controller, and a Promise Technology SATA II 150 Serial ATA PCI controller.

Kozio delivers pre-built test commands and suites providing focus and flow validation of FXS and FXO ports. Test commands are also provided to validate voice ports, by validating data transmitted between FXS and FXO ports.

The extensive Kozio diagnostic test library supports testing of the following items on relevant custom board designs:

• FXS port tests
• FXO port tests
• Voice port tests

This document provides examples, steps, and figures, using an ADI Engineering Coyote IXP425 Gateway platform and a Texas Instruments TNETV1060 development platform. The Coyote is based on the Intel® IXP425 processor, and the FXS ports are based on the Silicon Labs Si3210 chipset. The TNETV1060 is based on a MIPS 4Ke processor, TI DSP, and the Silicon Labs Si3210 and Si3050 chipsets.

The Kozio interactive diagnostics software, kDiagnostics, executes directly on the target platform and does not require a boot loader or operating system. In this manner, direct testing of the voice hardware can be performed before the boot loader and operating system drivers are ready or tested. The Kozio software is loaded into flash memory at the starting boot address and has been used to validate a single voice port in ten (10) seconds, greatly reducing the setup and touch-time of producing testing.

Kozio software provides complete configuration of the hardware system, for example, complete configuration of the PCM bus, including clock frequency, frame sync frequency, frame size, etc. Kozio software uses the Telephony Interface to generate a PCM clock of 2.048 MHz, and a frame clock of 8000 Hz on the Coyote platform. The TNETV1060 supports generation of the PCM clocking from the McBSP interface.